The invention disclosed generally relates to data processing systems and more particularly relates to a signal processing computer.
Signal processing in an analyzer unit consists mainly of digital filtering and performing Fourier transformations on large blocks of sensor data. Numerous other support operations such as weighting, long term integration, and output formatting are also required. These operations require a general purpose capability in the analyzer unit. To the present, high speed signal processors have not been general purpose in nature. There have been a large number of high speed digital filters and fast Fourier transform (FFT) analyzers designed but only a few designs have attempted to address high speed systems capable of efficiently performing a wide variety of signal processing algorithms plus post processing and display formatting functions.
Signal processing throughput requirements have been conventionally expressed in terms of a required number of multiples per second. The majority of processor loading is derived from filtering, FFT, and FFT weighting algorithms which tend to be multiply limited. However, an extensive number of post-FFT algorithms are required and these tend to be storage or adder limited, making loading expressions in terms of multiplies per second somewhat misleading unless a greater adder throughput and sufficient storage bandwidth can be demonstrated. Prior art signal processors have typically suffered from insufficient adder throughput and storage bandwidth.